SPT-a new smart power technology with a fully self aligned DMOS cell

SPT-a new smart power technology with a fully self aligned DMOS cell

Describes a novel smart power technology (SPT) which integrates n-channel (DMOS) power transistors for multichannel applications, p-channel high voltage transistors, and CMOS logic and bipolar devices. The DMOS was optimized with respect to minimal R/sub on/ (on-resistance) and breakdown voltage gre...

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Bibliographische Detailangaben
Hauptverfasser: Preussger, A., Glenz, E., Heift, K., Malek, K., Schwetlick, W., Wiesinger, K., Werner, W.M.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
CMOS logic circuits
CMOS technology
Isolation technology
Logic devices
Metallization
Silicon
Size measurement
Switches
Telecommunication switching
Voltage
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Beschreibung
Zusammenfassung:Describes a novel smart power technology (SPT) which integrates n-channel (DMOS) power transistors for multichannel applications, p-channel high voltage transistors, and CMOS logic and bipolar devices. The DMOS was optimized with respect to minimal R/sub on/ (on-resistance) and breakdown voltage greater than 75 V. With a self-aligned DMOS contact cell a specific R/sub on/ of 0.28 Omega -mm/sup 2/ without metal contribution was reached.< >
ISSN:1063-6854
1946-0201
DOI:10.1109/ISPSD.1991.146097