Fully-depleted SOI devices with elevated source/drain structure

0.35/spl mu/m thin-film fully-depleted SOI CMOS devices with elevated source/drain structure were fabricated by novel technology. Key process technologies were demonstrated. The devices have quasi-ideal subthreshold properties; the subthreshold slope of NMOSFETs and is 65mv/decade, while the subthreshold slope of PMOSFETs is 69mv/decade. The saturation current of NMOSFETs and PMOSFETs is 375/spl mu/A/um and 170/spl mu/A/um either. The saturation current of 1.2/spl mu/ NMOSFETs was increased by 32% with elevated source/drain structure. The saturation current of 1.2/spl mu/m PMOSFETs was increased by 24%. The per-stage propagation delay of 101-stage SOI CMOS ring oscillator is 75ps with 3 V supply voltage.