A parallel harmonic balance simulator for shared memory multicomputers
We describe a parallel harmonic balance simulator for shared memory multiprosessor computers. Parallelization is achieved by multithreaded versions of the key operations of the original serial code. We show that this minimal approach, in terms of changes to the simulator, produces a reasonably scala...
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| creator | Karanko, V. Honkala, M. |
| description | We describe a parallel harmonic balance simulator for shared memory multiprosessor computers. Parallelization is achieved by multithreaded versions of the key operations of the original serial code. We show that this minimal approach, in terms of changes to the simulator, produces a reasonably scalable simulator. This is proved by simulation timings based on an industrial design example. |
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| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1418956</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1418956</ieee_id><sourcerecordid>1418956</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-45511aac73a44f3f564610c794ee18ee5d1b9dd78289e57c15e3c88b24ceb1e53</originalsourceid><addsrcrecordid>eNotjEFqwzAQRQWl0CbNCbrRBQweS2NJyxCStBDoJl2HsTymKlJsJGeR28fQfni8xYP_JFaAtkblXFO_iE0pv_Uy5RAb_SoOWzlRphg5yh_KabwGLzuKdPUsS0i3SPOY5bBQls69TJzGfJdLmYMf03SbOZc38TxQLLz591p8H_bn3Ud1-jp-7ranKoDBudKIAETeKNJ6UAO2uoXaG6eZwTJjD53re2Mb6xiNB2Tlre0a7bkDRrUW73-_gZkvUw6J8v0CGqzDVj0A-fhFMQ</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A parallel harmonic balance simulator for shared memory multicomputers</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Karanko, V. ; Honkala, M.</creator><creatorcontrib>Karanko, V. ; Honkala, M.</creatorcontrib><description>We describe a parallel harmonic balance simulator for shared memory multiprosessor computers. Parallelization is achieved by multithreaded versions of the key operations of the original serial code. We show that this minimal approach, in terms of changes to the simulator, produces a reasonably scalable simulator. This is proved by simulation timings based on an industrial design example.</description><identifier>ISBN: 1580539920</identifier><identifier>ISBN: 9781580539920</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuit simulation ; Computational modeling ; Concurrent computing ; Frequency ; Large-scale systems ; Microwave circuits ; Nonlinear equations ; Polynomials ; Voltage ; Yarn</subject><ispartof>34th European Microwave Conference, 2004, 2004, Vol.2, p.849-851</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1418956$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1418956$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Karanko, V.</creatorcontrib><creatorcontrib>Honkala, M.</creatorcontrib><title>A parallel harmonic balance simulator for shared memory multicomputers</title><title>34th European Microwave Conference, 2004</title><addtitle>EUMC</addtitle><description>We describe a parallel harmonic balance simulator for shared memory multiprosessor computers. Parallelization is achieved by multithreaded versions of the key operations of the original serial code. We show that this minimal approach, in terms of changes to the simulator, produces a reasonably scalable simulator. This is proved by simulation timings based on an industrial design example.</description><subject>Circuit simulation</subject><subject>Computational modeling</subject><subject>Concurrent computing</subject><subject>Frequency</subject><subject>Large-scale systems</subject><subject>Microwave circuits</subject><subject>Nonlinear equations</subject><subject>Polynomials</subject><subject>Voltage</subject><subject>Yarn</subject><isbn>1580539920</isbn><isbn>9781580539920</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2004</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjEFqwzAQRQWl0CbNCbrRBQweS2NJyxCStBDoJl2HsTymKlJsJGeR28fQfni8xYP_JFaAtkblXFO_iE0pv_Uy5RAb_SoOWzlRphg5yh_KabwGLzuKdPUsS0i3SPOY5bBQls69TJzGfJdLmYMf03SbOZc38TxQLLz591p8H_bn3Ud1-jp-7ranKoDBudKIAETeKNJ6UAO2uoXaG6eZwTJjD53re2Mb6xiNB2Tlre0a7bkDRrUW73-_gZkvUw6J8v0CGqzDVj0A-fhFMQ</recordid><startdate>2004</startdate><enddate>2004</enddate><creator>Karanko, V.</creator><creator>Honkala, M.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2004</creationdate><title>A parallel harmonic balance simulator for shared memory multicomputers</title><author>Karanko, V. ; Honkala, M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-45511aac73a44f3f564610c794ee18ee5d1b9dd78289e57c15e3c88b24ceb1e53</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Circuit simulation</topic><topic>Computational modeling</topic><topic>Concurrent computing</topic><topic>Frequency</topic><topic>Large-scale systems</topic><topic>Microwave circuits</topic><topic>Nonlinear equations</topic><topic>Polynomials</topic><topic>Voltage</topic><topic>Yarn</topic><toplevel>online_resources</toplevel><creatorcontrib>Karanko, V.</creatorcontrib><creatorcontrib>Honkala, M.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Karanko, V.</au><au>Honkala, M.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A parallel harmonic balance simulator for shared memory multicomputers</atitle><btitle>34th European Microwave Conference, 2004</btitle><stitle>EUMC</stitle><date>2004</date><risdate>2004</risdate><volume>2</volume><spage>849</spage><epage>851</epage><pages>849-851</pages><isbn>1580539920</isbn><isbn>9781580539920</isbn><abstract>We describe a parallel harmonic balance simulator for shared memory multiprosessor computers. Parallelization is achieved by multithreaded versions of the key operations of the original serial code. We show that this minimal approach, in terms of changes to the simulator, produces a reasonably scalable simulator. This is proved by simulation timings based on an industrial design example.</abstract><pub>IEEE</pub><tpages>3</tpages></addata></record> |
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| ispartof | 34th European Microwave Conference, 2004, 2004, Vol.2, p.849-851 |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Circuit simulation Computational modeling Concurrent computing Frequency Large-scale systems Microwave circuits Nonlinear equations Polynomials Voltage Yarn |
| title | A parallel harmonic balance simulator for shared memory multicomputers |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-27T20%3A22%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20parallel%20harmonic%20balance%20simulator%20for%20shared%20memory%20multicomputers&rft.btitle=34th%20European%20Microwave%20Conference,%202004&rft.au=Karanko,%20V.&rft.date=2004&rft.volume=2&rft.spage=849&rft.epage=851&rft.pages=849-851&rft.isbn=1580539920&rft.isbn_list=9781580539920&rft_id=info:doi/&rft_dat=%3Cieee_6IE%3E1418956%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1418956&rfr_iscdi=true |