A parallel harmonic balance simulator for shared memory multicomputers

A parallel harmonic balance simulator for shared memory multicomputers

We describe a parallel harmonic balance simulator for shared memory multiprosessor computers. Parallelization is achieved by multithreaded versions of the key operations of the original serial code. We show that this minimal approach, in terms of changes to the simulator, produces a reasonably scala...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Karanko, V., Honkala, M.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuit simulation
Computational modeling
Concurrent computing
Frequency
Large-scale systems
Microwave circuits
Nonlinear equations
Polynomials
Voltage
Yarn
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Beschreibung
Zusammenfassung:We describe a parallel harmonic balance simulator for shared memory multiprosessor computers. Parallelization is achieved by multithreaded versions of the key operations of the original serial code. We show that this minimal approach, in terms of changes to the simulator, produces a reasonably scalable simulator. This is proved by simulation timings based on an industrial design example.