The method for integrating FBAR with circuitry on CMOS chip
A method is described to integrate a 3/spl times/2 ladder type film bulk acoustic wave (FBAR) filter on a CMOS chip. The modified Mason equivalent circuit model is used to simulate the FBAR characteristics. The filter is designed by the insertion loss method to meet the requirements. A low noise amp...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | A method is described to integrate a 3/spl times/2 ladder type film bulk acoustic wave (FBAR) filter on a CMOS chip. The modified Mason equivalent circuit model is used to simulate the FBAR characteristics. The filter is designed by the insertion loss method to meet the requirements. A low noise amplifier (LNA) has been designed and manufactured by the UMC 0.18 /spl mu/m process. By the use of a post CMOS process, the FBAR filter structure can be realized on a CMOS chip. Finally, the mass loading frequency trimming method can adjust the center frequency of the FBAR. The feasibility of integration can be proved by this method. |
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ISSN: | 1075-6787 |
DOI: | 10.1109/FREQ.2004.1418520 |