Characterization of monolithic spiral inductors on a 0.25 /spl mu/m digital CMOS process

The growth of wireless applications in the low GHz range has been a catalyst in numerous research activities to develop wireless applications in standard digital CMOS processes. The relatively lower costs in developing single chip solutions for wireless applications in CMOS technology is considered its main advantage over other semiconductor processes. Thus, with the integration of RF systems in CMOS, planar inductors will have a dominant role in defining the achievable performance of the system as a whole. In this paper, the characterization of square spiral inductors is presented. The performance of inductors is analyzed using an inductor model based on the model proposed by Yue. Two inductors with values, 1.8 nH and 10 nH, are implemented on a 0.25 /spl mu/m digital CMOS process. Q-enhancement techniques are also implemented together with the inductors to investigate their effectiveness in improving the quality factor of inductors.