Electromigration-dependent parametric yield estimation

Electromigration-dependent parametric yield estimation

We define and investigate the problem of electromigration faults caused by spot defects during the VLSI manufacturing process. Analysis is given for a simple layout, and simulations are presented and discussed for a more complicated case. It is shown that in some cases, electromigration-dependent pa...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Barsky, R., Wagner, I.A.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analytical models
Circuit faults
Computational modeling
Computer science
Electromigration
Frequency estimation
Manufacturing processes
Very large scale integration
Wire
Yield estimation
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Beschreibung
Zusammenfassung:We define and investigate the problem of electromigration faults caused by spot defects during the VLSI manufacturing process. Analysis is given for a simple layout, and simulations are presented and discussed for a more complicated case. It is shown that in some cases, electromigration-dependent parametric faults can make a significant contribution to the total yield estimation.
DOI:10.1109/ICECS.2004.1399629