Characterizing semiconductor devices using computational intelligence techniques with semiconductor automatic test system (ATE)

Characterization of semiconductor devices is used to gather as much data about the device as possible to determine weaknesses in design or trends in the manufacturing process. This is done by varying the device specification parameters with respect to set of predefined tests and determining where the part passes or fails. The key to this process is discovering the single trip (fig. 1. pass/fail) point as accurately as possible. However, this approach cannot guarantee the robustness of device performance variation vs specification based on only a single trip point and single test analysis. This means device could still violate the specification while passing all characterization tests. In this paper, we propose a novel multiple trip point characterization concept to overcome the constraint of single trip point concept in device characterization phase. In addition, we use computational intelligence techniques to further manipulate these sets of multiple trip point values and tests based on semiconductor ATE, such that characterization trip point values with respect to different tests can be learned by neural network and fuzzy system, then performing classification task of worst case variation of device's performance vs specification. At last, the final worst-case variation can be further detected by genetic algorithm. Our experimental results demonstrate an excellent design parameter variation analysis in device characterization phase, as well as detection of a set of worst-case tests that can provoke the worst-case variation, while traditional approach was not capable of detecting them.