Effectiveness of using supply voltage as back-gate bias in ground plane SOI MOSFET

Effectiveness of using supply voltage as back-gate bias in ground plane SOI MOSFET

We show that GP-SOI MOSFETs are optimal for the DBB scheme offering high on-current and low design complexity without having power performance issues related to the forward-biased p-n junction current in bulk CMOS. It is also shown that GP-SOI can deliver the same performance as DG-SOI 90X lower sta...

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Bibliographische Detailangaben
Hauptverfasser: Kim, C.H., Ananthan, H., Jae-Joon Kim, Roy, K.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
CMOS technology
Computer hacking
Insulation
Inverters
Land surface temperature
MOSFET circuits
P-n junctions
Power dissipation
Temperature sensors
Voltage
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Zusammenfassung:We show that GP-SOI MOSFETs are optimal for the DBB scheme offering high on-current and low design complexity without having power performance issues related to the forward-biased p-n junction current in bulk CMOS. It is also shown that GP-SOI can deliver the same performance as DG-SOI 90X lower standby leakage by dynamically switching the back-gate bias.
DOI:10.1109/SOI.2004.1391559