Current issues and strategies in chip and higher level packaging

As the degree of integration and number of local component interconnects has grown, the number of interconnects between boards as also increased. The increase has been substantial; to the point that on boards, the amount of available edge connect space along the periphery of the board is disappearing. For interconnections between electronic boxes, the amount of external electronic harnesses and connections is becoming difficult to handle at the test and system integration level. In addition, the bandwidth of board-to-board and box-to-box designs has increased with the continual desire to move to higher frequencies which puts additional requirements on the designs and materials used for interconnections. There are thus two pressures on interconnects, the first being the increased density required and the second being the desired capability to operate at higher and higher frequencies. To reduce the amount of interconnect, various methods such as serialization of many low bandwidth signals into a high bandwidth stream and free space optical interconnect (FSOI) have been described in the literature. In addition, cables, flexible interconnect strategies, and connectors have been designed and tested to fairly high frequencies. Some of these approaches can potentially reduce the number of interconnects required between boards and boxes. This work describes recent advances reported in the literature on these types of technologies. It also describes some practical problems encountered with some approaches and the potential benefits that might accrue for both signal integrity and reduced pressure on interconnect density should optimized systems be incorporated into designs.