SPICE macro models for annular MOSFETs
MOSFETs with annular, or enclosed, geometries are now finding frequent use in rad-hard by design (RHBD) approaches to designing custom CMOS ASICs for aerospace applications. Unfortunately, these devices are not accurately modeled by the BSIM3 models normally provided for devices with ordinary rectan...
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creator | Strohbehn, K. Martin, M.N. |
description | MOSFETs with annular, or enclosed, geometries are now finding frequent use in rad-hard by design (RHBD) approaches to designing custom CMOS ASICs for aerospace applications. Unfortunately, these devices are not accurately modeled by the BSIM3 models normally provided for devices with ordinary rectangular gates. We present a SPICE macro model for an annular n-channel MOSFET to account for the annular geometry effects on gate overlap capacitance and output conductance. |
doi_str_mv | 10.1109/AERO.2004.1368031 |
format | Conference Proceeding |
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Unfortunately, these devices are not accurately modeled by the BSIM3 models normally provided for devices with ordinary rectangular gates. We present a SPICE macro model for an annular n-channel MOSFET to account for the annular geometry effects on gate overlap capacitance and output conductance.</description><identifier>ISSN: 1095-323X</identifier><identifier>ISBN: 0780381556</identifier><identifier>ISBN: 9780780381551</identifier><identifier>EISSN: 2996-2358</identifier><identifier>DOI: 10.1109/AERO.2004.1368031</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuits ; CMOS process ; Costs ; Geometry ; MOSFETs ; Radiation hardening ; Semiconductor device modeling ; Single event upset ; Solid modeling ; SPICE</subject><ispartof>2004 IEEE Aerospace Conference Proceedings (IEEE Cat. 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No.04TH8720)</title><addtitle>AERO</addtitle><description>MOSFETs with annular, or enclosed, geometries are now finding frequent use in rad-hard by design (RHBD) approaches to designing custom CMOS ASICs for aerospace applications. Unfortunately, these devices are not accurately modeled by the BSIM3 models normally provided for devices with ordinary rectangular gates. We present a SPICE macro model for an annular n-channel MOSFET to account for the annular geometry effects on gate overlap capacitance and output conductance.</description><subject>Circuits</subject><subject>CMOS process</subject><subject>Costs</subject><subject>Geometry</subject><subject>MOSFETs</subject><subject>Radiation hardening</subject><subject>Semiconductor device modeling</subject><subject>Single event upset</subject><subject>Solid modeling</subject><subject>SPICE</subject><issn>1095-323X</issn><issn>2996-2358</issn><isbn>0780381556</isbn><isbn>9780780381551</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2004</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj09LwzAYh4N_wG76AcRLT97SvXnTN02Oo3Q6mHQ4BW8jTVKotKs0evDbW3CnBx54fvBj7F5AJgSY1bp6rTMEyDMhlQYpLliCxiiOkvQlW0AxSy2I1BVL5oC4RPlxwxYxfgIgoIaEPR7227JKB-umMR1GH_qYtuOU2tPpp7dT-lIfNtVbvGXXre1juDtzyd5nXT7zXf20Ldc73omCvrklq8A2ioxXTnlywih0jffONbo12grjCSEPqnAayOvG5R4F5t6YViHJJXv43-1CCMevqRvs9Hs8_5N_Lf5AKQ</recordid><startdate>2004</startdate><enddate>2004</enddate><creator>Strohbehn, K.</creator><creator>Martin, M.N.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2004</creationdate><title>SPICE macro models for annular MOSFETs</title><author>Strohbehn, K. ; Martin, M.N.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-a5a60ab659d6c6d5c1962cbddccb8f98a19d5204e67c805d8bc4d2124d99f6253</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Circuits</topic><topic>CMOS process</topic><topic>Costs</topic><topic>Geometry</topic><topic>MOSFETs</topic><topic>Radiation hardening</topic><topic>Semiconductor device modeling</topic><topic>Single event upset</topic><topic>Solid modeling</topic><topic>SPICE</topic><toplevel>online_resources</toplevel><creatorcontrib>Strohbehn, K.</creatorcontrib><creatorcontrib>Martin, M.N.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Strohbehn, K.</au><au>Martin, M.N.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>SPICE macro models for annular MOSFETs</atitle><btitle>2004 IEEE Aerospace Conference Proceedings (IEEE Cat. No.04TH8720)</btitle><stitle>AERO</stitle><date>2004</date><risdate>2004</risdate><volume>4</volume><spage>2370</spage><epage>2377 Vol.4</epage><pages>2370-2377 Vol.4</pages><issn>1095-323X</issn><eissn>2996-2358</eissn><isbn>0780381556</isbn><isbn>9780780381551</isbn><abstract>MOSFETs with annular, or enclosed, geometries are now finding frequent use in rad-hard by design (RHBD) approaches to designing custom CMOS ASICs for aerospace applications. Unfortunately, these devices are not accurately modeled by the BSIM3 models normally provided for devices with ordinary rectangular gates. We present a SPICE macro model for an annular n-channel MOSFET to account for the annular geometry effects on gate overlap capacitance and output conductance.</abstract><pub>IEEE</pub><doi>10.1109/AERO.2004.1368031</doi></addata></record> |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Circuits CMOS process Costs Geometry MOSFETs Radiation hardening Semiconductor device modeling Single event upset Solid modeling SPICE |
title | SPICE macro models for annular MOSFETs |
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