FPGA-efficient phase-to-I/Q architecture

FPGA-efficient phase-to-I/Q architecture

A hybrid architecture for digital phase-to-inphase/quadrature (I/Q) at constant-magnitude transformers is presented. The design may be efficiently implemented in FPGA. Starting from the well established co-ordinate rotation digital computer (CORDIC) algorithm, and from look-up table (LUT) schemes, o...

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Bibliographische Detailangaben
Hauptverfasser: Janiszewski, I., Meuth, H., Hoppe, B.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Algorithm design and analysis
Applied sciences
Circuit properties
Computer architecture
Design. Technologies. Operation analysis. Testing
Digital circuits
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Equations
Exact sciences and technology
Hardware
Integrated circuits
Partitioning algorithms
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal generators
Signal processing
Signal processing algorithms
Table lookup
Transformers
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Beschreibung
Zusammenfassung:A hybrid architecture for digital phase-to-inphase/quadrature (I/Q) at constant-magnitude transformers is presented. The design may be efficiently implemented in FPGA. Starting from the well established co-ordinate rotation digital computer (CORDIC) algorithm, and from look-up table (LUT) schemes, optimum hybrid configurations are derived. Via fully synthesizable HDL models, portability and reusability are ensured. The hybrid LUT/CORDIC architecture allows design partitioning between logic and storage based FPGA resources and is suitable also for multi-phase implementations.
DOI:10.1109/SOCC.2004.1362468