Compressed embedded diagnosis of logic cores

Compressed embedded diagnosis of logic cores

This paper introduces a new method for deterministic diagnosis of logic cores. The proposed method is based on on-chip decompression and comparison of incompletely specified test patterns and test responses. Using experimental data, the trade-offs between the number of tester channels, on-chip area...

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Hauptverfasser: Ollivierre, S., Kinsman, A.B., Nicolici, N.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Applied sciences
Built-in self-test
Circuit testing
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Hardware
Integrated circuits
Isolation technology
Logic
Manufacturing processes
Packaging
Production
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
System-on-a-chip
Test data compression
Testing, measurement, noise and reliability
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Beschreibung
Zusammenfassung:This paper introduces a new method for deterministic diagnosis of logic cores. The proposed method is based on on-chip decompression and comparison of incompletely specified test patterns and test responses. Using experimental data, the trade-offs between the number of tester channels, on-chip area and scan time are discussed.
ISSN:1063-6404
2576-6996
DOI:10.1109/ICCD.2004.1347973