An 8Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation and clock deskew

An 8Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation and clock deskew

An 8Gb/s binary source-synchronous I/O link with adaptive receiver-equalization, offset cancellation and clock deskew is implemented in 0.13/spl mu/m CMOS. The analog equalizer is implemented as an 8-way interleaved, 4-tap discrete-time linear filter. On-die adaptation logic determines optimal recei...

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Hauptverfasser: Jaussi, J.E., Balamurugan, G., Johnson, D.R., Casper, B.K., Martin, A., Kennedy, J.T., Shanbhag, N., Mooney, R.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Adaptive equalizers
Applied sciences
Clocks
Data communication
Exact sciences and technology
Finite impulse response filter
Intersymbol interference
Latches
Microprocessors
Mirrors
Power dissipation
Radiocommunications
Sampling methods
Telecommunications
Telecommunications and information theory
Transmitters. Receivers
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Beschreibung
Zusammenfassung:An 8Gb/s binary source-synchronous I/O link with adaptive receiver-equalization, offset cancellation and clock deskew is implemented in 0.13/spl mu/m CMOS. The analog equalizer is implemented as an 8-way interleaved, 4-tap discrete-time linear filter. On-die adaptation logic determines optimal receiver settings.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2004.1332686