Industrial experience with test generation languages gar processor verification

We report on our experience with a new test generation language for processor verification. The verification of two superscalar multiprocessors is described and we show the ease of expressing complex verification tasks. The cost and benefit are demonstrated: training takes up to six months; the simu...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Behm, M., Ludden, J., Lichtenstein, Y., Rimon, M., Vinov, M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Computer bugs Graphical user interfaces Hardware Laboratories Logic design Permission Power engineering and energy Silicon Testing Time to market
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	We report on our experience with a new test generation language for processor verification. The verification of two superscalar multiprocessors is described and we show the ease of expressing complex verification tasks. The cost and benefit are demonstrated: training takes up to six months; the simulation time required for a desired level of coverage has decreased by a factor of twenty; the number of escape bugs has ken reduced.
ISSN:	0738-100X