FPGA implementation of space-time block coding systems

FPGA implementation of space-time block coding systems

In this paper, the implementation of space-time block coding systems is discussed, particularly through the use of programmable logic such as FPGAs. The rationale for choice of such devices in preference to DSPs is discussed followed by an analysis of the design and development process and the metho...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Baghaie A, M., Kuo, S., McLoughlin, I.V.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Block codes
Clocks
Digital signal processing
Field programmable gate arrays
Hardware
Logic devices
Process design
Programmable logic arrays
Programmable logic devices
Space technology
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Beschreibung
Zusammenfassung:In this paper, the implementation of space-time block coding systems is discussed, particularly through the use of programmable logic such as FPGAs. The rationale for choice of such devices in preference to DSPs is discussed followed by an analysis of the design and development process and the methodologies employed in the design process. An example space-time system, time-reversal space-time block coding (TR-STBC) is discussed and implementation described.
DOI:10.1109/CASSET.2004.1321957