ASET: a formal model for system emulation and verification

This paper describes a proposed formal model for system specification ASET (advanced system emulation technique) and discusses the mathematical model underlying the prototyping environment based on ASET. ASET has been developed specifically to aid rapid prototyping of software systems. It provides a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Bhattacharyya, S., Bhattacharyya, J., Chaudhuri, A.R.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This paper describes a proposed formal model for system specification ASET (advanced system emulation technique) and discusses the mathematical model underlying the prototyping environment based on ASET. ASET has been developed specifically to aid rapid prototyping of software systems. It provides an environment for system simulation and verification. A tool based on ASET has been developed and can be used to generate executable code directly from design specifications. Active consideration has been given in ASET to concurrent processes and distributed systems. The design specification in ASET implements both distinct control and data flows as well as allowing specification of data dependent control conditions. This paper provides a formal model for the components of ASET and discusses the verification and prediction aspects.
ISSN:1074-6005
2332-6581
DOI:10.1109/IWRSP.2004.1311090