Design and analysis of novel glass WLCSP structure

A novel glass wafer level chip scaled packaging (WLCSP) structure is proposed herein to resolve the challenge faced by packaging houses to modify their mass-production packaging equipment from an 8" wafer process to a 12" one, due to the increasing demand of the semiconductor manufacturers...

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Hauptverfasser: Chang-Ann Yuan, Cheng Nan Han, Kou-Ning Chiang
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Cheng Nan Han
Kou-Ning Chiang
description A novel glass wafer level chip scaled packaging (WLCSP) structure is proposed herein to resolve the challenge faced by packaging houses to modify their mass-production packaging equipment from an 8" wafer process to a 12" one, due to the increasing demand of the semiconductor manufacturers' 12" wafer process. The finite element method and parametric analysis are applied to obtain a robust design parameter for the proposed glass WLCSP structure. This novel packaging structure comprises a chip that is first diced from the 12" wafer and is attached to 8" glass. Then the conventional 8" WLCSP process can be accomplished on this 8" glass. After the validation of the solder joint stand-off height, a finite element model is conducted to elucidate the reliability issues of the proposed glass WLCSP. The simulation results show that the robust design parameters could enhance the reliability of the proposed glass WLCSP structure by about 3.5 times, compared to the original design parameters.
doi_str_mv 10.1109/ESIME.2004.1304051
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fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1304051</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1304051</ieee_id><sourcerecordid>1304051</sourcerecordid><originalsourceid>FETCH-LOGICAL-i173t-4835ed6f3f1dad397f87d4f3ad3255a743f66f598e97ef4d52a1bf578d3444943</originalsourceid><addsrcrecordid>eNotT1FLwzAYDIigzP4BfckfaE36fWmSR6lVBxUHm_g4osk3IrWTphP27w1sxx13cHBwjN1KUUkp7H23Xr52VS0EVhIECiUvWGG1EZlgMBdXrEjpW2SgQmHUNasfQ4q7kbvRZ7nhmGLie-Lj_i8MfDe4lPhH365XPM3T4Ws-TOGGXZIbUijOvmDvT92mfSn7t-dl-9CXUWqYSzSggm8ISHrnwWoy2iNBzrVSTiNQ05CyJlgdCL2qnfwkpY0HRLQIC3Z32o0hhO3vFH_cdNyen8E_3qlCog</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Design and analysis of novel glass WLCSP structure</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Chang-Ann Yuan ; Cheng Nan Han ; Kou-Ning Chiang</creator><creatorcontrib>Chang-Ann Yuan ; Cheng Nan Han ; Kou-Ning Chiang</creatorcontrib><description>A novel glass wafer level chip scaled packaging (WLCSP) structure is proposed herein to resolve the challenge faced by packaging houses to modify their mass-production packaging equipment from an 8" wafer process to a 12" one, due to the increasing demand of the semiconductor manufacturers' 12" wafer process. The finite element method and parametric analysis are applied to obtain a robust design parameter for the proposed glass WLCSP structure. This novel packaging structure comprises a chip that is first diced from the 12" wafer and is attached to 8" glass. Then the conventional 8" WLCSP process can be accomplished on this 8" glass. After the validation of the solder joint stand-off height, a finite element model is conducted to elucidate the reliability issues of the proposed glass WLCSP. The simulation results show that the robust design parameters could enhance the reliability of the proposed glass WLCSP structure by about 3.5 times, compared to the original design parameters.</description><identifier>ISBN: 9780780384200</identifier><identifier>ISBN: 0780384202</identifier><identifier>DOI: 10.1109/ESIME.2004.1304051</identifier><language>eng</language><publisher>IEEE</publisher><subject>Chip scale packaging ; Finite element methods ; Glass manufacturing ; Manufacturing processes ; Packaging machines ; Robustness ; Semiconductor device manufacture ; Semiconductor device packaging ; Soldering ; Wafer scale integration</subject><ispartof>5th International Conference on Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004. EuroSimE 2004. Proceedings of the, 2004, p.279-285</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1304051$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,777,781,786,787,2052,4036,4037,27906,54901</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1304051$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chang-Ann Yuan</creatorcontrib><creatorcontrib>Cheng Nan Han</creatorcontrib><creatorcontrib>Kou-Ning Chiang</creatorcontrib><title>Design and analysis of novel glass WLCSP structure</title><title>5th International Conference on Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004. EuroSimE 2004. Proceedings of the</title><addtitle>ESIME</addtitle><description>A novel glass wafer level chip scaled packaging (WLCSP) structure is proposed herein to resolve the challenge faced by packaging houses to modify their mass-production packaging equipment from an 8" wafer process to a 12" one, due to the increasing demand of the semiconductor manufacturers' 12" wafer process. The finite element method and parametric analysis are applied to obtain a robust design parameter for the proposed glass WLCSP structure. This novel packaging structure comprises a chip that is first diced from the 12" wafer and is attached to 8" glass. Then the conventional 8" WLCSP process can be accomplished on this 8" glass. After the validation of the solder joint stand-off height, a finite element model is conducted to elucidate the reliability issues of the proposed glass WLCSP. The simulation results show that the robust design parameters could enhance the reliability of the proposed glass WLCSP structure by about 3.5 times, compared to the original design parameters.</description><subject>Chip scale packaging</subject><subject>Finite element methods</subject><subject>Glass manufacturing</subject><subject>Manufacturing processes</subject><subject>Packaging machines</subject><subject>Robustness</subject><subject>Semiconductor device manufacture</subject><subject>Semiconductor device packaging</subject><subject>Soldering</subject><subject>Wafer scale integration</subject><isbn>9780780384200</isbn><isbn>0780384202</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2004</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotT1FLwzAYDIigzP4BfckfaE36fWmSR6lVBxUHm_g4osk3IrWTphP27w1sxx13cHBwjN1KUUkp7H23Xr52VS0EVhIECiUvWGG1EZlgMBdXrEjpW2SgQmHUNasfQ4q7kbvRZ7nhmGLie-Lj_i8MfDe4lPhH365XPM3T4Ws-TOGGXZIbUijOvmDvT92mfSn7t-dl-9CXUWqYSzSggm8ISHrnwWoy2iNBzrVSTiNQ05CyJlgdCL2qnfwkpY0HRLQIC3Z32o0hhO3vFH_cdNyen8E_3qlCog</recordid><startdate>2004</startdate><enddate>2004</enddate><creator>Chang-Ann Yuan</creator><creator>Cheng Nan Han</creator><creator>Kou-Ning Chiang</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2004</creationdate><title>Design and analysis of novel glass WLCSP structure</title><author>Chang-Ann Yuan ; Cheng Nan Han ; Kou-Ning Chiang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i173t-4835ed6f3f1dad397f87d4f3ad3255a743f66f598e97ef4d52a1bf578d3444943</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Chip scale packaging</topic><topic>Finite element methods</topic><topic>Glass manufacturing</topic><topic>Manufacturing processes</topic><topic>Packaging machines</topic><topic>Robustness</topic><topic>Semiconductor device manufacture</topic><topic>Semiconductor device packaging</topic><topic>Soldering</topic><topic>Wafer scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Chang-Ann Yuan</creatorcontrib><creatorcontrib>Cheng Nan Han</creatorcontrib><creatorcontrib>Kou-Ning Chiang</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chang-Ann Yuan</au><au>Cheng Nan Han</au><au>Kou-Ning Chiang</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Design and analysis of novel glass WLCSP structure</atitle><btitle>5th International Conference on Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004. EuroSimE 2004. Proceedings of the</btitle><stitle>ESIME</stitle><date>2004</date><risdate>2004</risdate><spage>279</spage><epage>285</epage><pages>279-285</pages><isbn>9780780384200</isbn><isbn>0780384202</isbn><abstract>A novel glass wafer level chip scaled packaging (WLCSP) structure is proposed herein to resolve the challenge faced by packaging houses to modify their mass-production packaging equipment from an 8" wafer process to a 12" one, due to the increasing demand of the semiconductor manufacturers' 12" wafer process. The finite element method and parametric analysis are applied to obtain a robust design parameter for the proposed glass WLCSP structure. This novel packaging structure comprises a chip that is first diced from the 12" wafer and is attached to 8" glass. Then the conventional 8" WLCSP process can be accomplished on this 8" glass. After the validation of the solder joint stand-off height, a finite element model is conducted to elucidate the reliability issues of the proposed glass WLCSP. The simulation results show that the robust design parameters could enhance the reliability of the proposed glass WLCSP structure by about 3.5 times, compared to the original design parameters.</abstract><pub>IEEE</pub><doi>10.1109/ESIME.2004.1304051</doi><tpages>7</tpages></addata></record>
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identifier ISBN: 9780780384200
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subjects Chip scale packaging
Finite element methods
Glass manufacturing
Manufacturing processes
Packaging machines
Robustness
Semiconductor device manufacture
Semiconductor device packaging
Soldering
Wafer scale integration
title Design and analysis of novel glass WLCSP structure
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-20T04%3A48%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Design%20and%20analysis%20of%20novel%20glass%20WLCSP%20structure&rft.btitle=5th%20International%20Conference%20on%20Thermal%20and%20Mechanical%20Simulation%20and%20Experiments%20in%20Microelectronics%20and%20Microsystems,%202004.%20EuroSimE%202004.%20Proceedings%20of%20the&rft.au=Chang-Ann%20Yuan&rft.date=2004&rft.spage=279&rft.epage=285&rft.pages=279-285&rft.isbn=9780780384200&rft.isbn_list=0780384202&rft_id=info:doi/10.1109/ESIME.2004.1304051&rft_dat=%3Cieee_6IE%3E1304051%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1304051&rfr_iscdi=true