Diffusion-an analytic procedure applied to macro cell placement

A description is presented of a novel optimization procedure called diffusion which can be used in global circuit placement for suppressing inter-module and module-to-chip boundary overlaps. A salient feature of the proposed diffusion procedure is that multiple decisions on the moves of all variables (module positions) are simultaneously made such that a global, analytic objective function is minimized. Various strategies are discussed to speed up the convergence, and to prevent the solution from being stuck at local minima. A net force model is used with the diffusion procedure to minimize the inter-module wire length besides reducing the inter-module and module-to-chip overlaps. Various experimental results are given. Further potential applications of the proposed procedure include multilayer placement, and placement in an arbitrarily-shaped region.< >