A 210mW graphics LSI implementing full 3D pipeline with 264Mtexels/s texturing for mobile multimedia applications

A 121 mm/sup 2/ graphics LSI is for portable 2D/3D graphics and MPEG4 applications. The LSI contains a RISC processor with MAC, a 3D rendering engine, 29Mb DRAM and is built in a 0.16/spl mu/m pure DRAM technology. Programmable clocking allows the LSI to operate in several power modes for various ap...

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Bibliographische Detailangaben
Hauptverfasser:	Ramchan Woo, Sungdae Choi, Ju-Ho Sohn, Seong-Jun Song, Young-Don Bae, Chi-Weon Yoon, Byeong-Gyu Nam, Jeong-Ho Woo, Sung-Eun Kim, In-Cheol Park, Sungwon Shin, Kyung-Dong Yoo, Jin-Yong Chung, Hoi-Jun Yoo
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Clocks Costs Engines Graphics Large scale integration MPEG 4 Standard Pipelines Random access memory Reduced instruction set computing Rendering (computer graphics)
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Beschreibung
Zusammenfassung:	A 121 mm/sup 2/ graphics LSI is for portable 2D/3D graphics and MPEG4 applications. The LSI contains a RISC processor with MAC, a 3D rendering engine, 29Mb DRAM and is built in a 0.16/spl mu/m pure DRAM technology. Programmable clocking allows the LSI to operate in several power modes for various applications. In lower cost mode, power consumption is under 210mW, delivering 264M texture mapped pixels per second.
ISSN:	0193-6530 2376-8606
DOI:	10.1109/ISSCC.2003.1234200