Quadrature sampling schemes with improved image rejection
A fundamental problem of analog quadrature sampling circuits is the in-phase/quadrature-phase (I/Q) mismatch, which adversely affects their image rejection performance. This brief proposes two new quadrature sampling circuits for the sampling of complex intermediate frequency signals with high image...
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Veröffentlicht in: | IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 2003-09, Vol.50 (9), p.641-648 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A fundamental problem of analog quadrature sampling circuits is the in-phase/quadrature-phase (I/Q) mismatch, which adversely affects their image rejection performance. This brief proposes two new quadrature sampling circuits for the sampling of complex intermediate frequency signals with high image rejection performance. The first circuit reduces the I/Q mismatches by time-sharing of the sampling capacitors and by employing a special clocking scheme. The second circuit integrates a first-order complex notch filter to provide extra image rejection. Both circuits are very simple and they introduce little overhead compared with conventional circuits. Circuit simulations show that for 2% channel mismatch, the first circuit removes completely the image interferer, and the second one achieves over 70 dB of image rejection ratio in a narrow band around direct current, while the conventional circuits achieve only about 40 dB. |
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ISSN: | 1057-7130 1558-125X |
DOI: | 10.1109/TCSII.2003.816927 |