A low-power low-IF DDPSK receiver in 0.35-/spl mu/m SOI CMOS technology

A low-power low-IF DDPSK receiver in 0.35-/spl mu/m SOI CMOS technology

A low-power low-IF double differential PSK receiver is implemented in a 0.35-/spl mu/m silicon on insulator (SOI) CMOS technology. Low-power front-end allows the implementation of the receiver with minimal power consumption. The receiver operates at 435 MHz RF. RF front-end and baseband measurements...

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Bibliographische Detailangaben
Hauptverfasser: Zencir, E., Yuce, M.R., Huang, T., Marks, J., Dogan, N.S., Liu, W., Arvas, E.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Baseband
CMOS technology
Decoding
Doppler shift
Frequency conversion
Mars
Phase shift keying
Power dissipation
Radio frequency
Silicon on insulator technology
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Zusammenfassung:A low-power low-IF double differential PSK receiver is implemented in a 0.35-/spl mu/m silicon on insulator (SOI) CMOS technology. Low-power front-end allows the implementation of the receiver with minimal power consumption. The receiver operates at 435 MHz RF. RF front-end and baseband measurements show that a fully-integrated low-power low-IF receiver that tolerates large Doppler shift is feasible.
DOI:10.1109/RAWCON.2003.1227916