Tunable work function dual metal gate technology for bulk and non-bulk CMOS

Tunable work function dual metal gate technology for bulk and non-bulk CMOS

This paper describes a metal gate process, which provides tunable work function values and ease of integration for dual metal gate process flow. Vertical stacks of Ru and Ta layers were subjected to high temperature anneals to promote intermixing which resulted in /spl phi//sub m/ tuning. It was fou...

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Hauptverfasser: JaeHoon Lee, Huicai Zhong, You-Seok Suh, Heuss, G., Gurganus, J., Bei Chen, Misra, V.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Annealing
Applied sciences
Capacitance-voltage characteristics
Channel bank filters
CMOS technology
Design. Technologies. Operation analysis. Testing
Electrodes
Electronics
Exact sciences and technology
Fabrication
Fluctuations
Integrated circuits
MOS capacitors
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Stability
Temperature
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Beschreibung
Zusammenfassung:This paper describes a metal gate process, which provides tunable work function values and ease of integration for dual metal gate process flow. Vertical stacks of Ru and Ta layers were subjected to high temperature anneals to promote intermixing which resulted in /spl phi//sub m/ tuning. It was found that Ru/Ta stacks provided up to 0.4 eV reduction in /spl phi//sub m/ compared to Ru. To increase this change, stacks of Ru/sub 50/Ta/sub 50//Ru were also evaluated and nearly a 0.8 eV change in /spl phi//sub m/ was observed between Ru/sub 50/Ta/sub 50//Ru and Ru/sub 50/Ta/sub 50/ electrodes.
DOI:10.1109/IEDM.2002.1175852