Hybrid Protective Device for MOS-LSI Chips

Hybrid Protective Device for MOS-LSI Chips

In this paper, several structures that can be used to protect MOS-LSl chips against electrostatic discharges (ESD) are examined experimentally to determine some of the possible specification tradeoffs that result in improved overall performance. It is shown that by using structures able to withstand...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on parts, hybrids, and packaging hybrids, and packaging, 1976-09, Vol.12 (3), p.172-175
Hauptverfasser: De La Moneda, F., Debar, D., Stuby, K., Bertin, C.
Format: Artikel
Sprache:eng
Schlagworte:
Breakdown voltage
Capacitance
Circuit testing
Electrostatic discharge
Humans
MOS capacitors
Partial discharges
Protection
Spark gaps
Surges
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In this paper, several structures that can be used to protect MOS-LSl chips against electrostatic discharges (ESD) are examined experimentally to determine some of the possible specification tradeoffs that result in improved overall performance. It is shown that by using structures able to withstand larger energy discharges at the expense of their voltage-clamping characteristics, higher overvoltages can be handled. Additional protection is possible by incorporating a spark-gap device on the chip-carrying module. Conditions under which this hybrid combination is effective are ex- amined.
ISSN:0361-1000
1558-2469
DOI:10.1109/TPHP.1976.1135132