Area efficient current steering DAC using current tuning

A 10 bit segmented (5+5 bit) high speed current steering DAC is presented in this paper. Devices with small area are used to reduce the total area without affecting linearity. A current tuning loop is suggested to overcome the sizing mismatch error. The master slave concept is used along with this t...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	Sunil Rafeeque, K.P.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Analog circuits Calibration Clocks Decoding Frequency conversion Linearity Master-slave Signal resolution Switches Voltage
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