A 0.22 mm² 0.5~4 GHz Active Single-Sideband Time Modulator With a Single Digital-Sequence Control

This letter proposes a novel single-sideband time modulator (STM) that uses a periodically controlled 4-bit active vector modulator with regularly controlled gate widths. Timing sequences for control bits are generated from a single digital sequence using a \div 16 frequency divider. By precisely delaying the single digital sequence, the proposed active STM achieves high-precision and frequency-independent phase-shifting performance while enhancing the sideband suppression ratio (SSR) without raising insertion loss. Fabricated in 0.13- \mu m CMOS technology, it occupies a compact area of 1.1\times 0.2 mm2. Measured results show an equivalent 10-bit phase resolution, root mean square (rms) phase error of 0.13°~0.36°, and rms gain error of 0.05~0.31 dB in a frequency range of 0.5~4.0 GHz. The measured SSR is less than −23.5 dBc, and the instantaneous bandwidth is expanded to 16~f_{\text {P}} .