An FPGA-Based 64-Channel Readout Electronics for High-Resolution TOF-PET Detectors

Field programmable logic array (FPGA) based readout electronics has shown its capability of channel-bychannel signal readout for time-of-flight positron emission tomography (TOF-PET) detectors. However, for detectors that rely on light sharing to achieve sub-pixel resolution, the high linear measure...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on radiation and plasma medical sciences 2024-08, p.1-1
Hauptverfasser: Zhang, Xiang, Wang, Yonggang, Wang, Mingchen, Kong, Xiaoguang
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Field programmable logic array (FPGA) based readout electronics has shown its capability of channel-bychannel signal readout for time-of-flight positron emission tomography (TOF-PET) detectors. However, for detectors that rely on light sharing to achieve sub-pixel resolution, the high linear measurement dynamic range of the readout electronics is highly required. In this paper, the problems with dynamic range in our previously proposed FPGA-based fast linear discharge circuit are investigated and corresponding methods are proposed to enhance its small signal measurement capability and improve the timing performance as well. A practical 64-channel TOF-PET detector module was constructed and evaluated. The readout electronics test results demonstrated a 240x measurement dynamic range with 99.5% conversion linearity. In the case that the 8×8 silicon photomultiplier (SiPM) array in the detector combines with an 8×8 LYSO crystal (each 3.2×3.2×10mm3) array, the average energy and coincidence time resolution of the detector are measured as 10.68% (511keV) and 364.9ps respectively. To demonstrate the benefit of large dynamic range to high-resolution detectors, the crystal array in the detector was replaced by a 24×24 LYSO array (each 1.04×1.04×15mm3) and achieved 1mm resolution. The test results confirm that the proposed FPGA-based readout circuit is practical for laboratory instrumentation.
ISSN:2469-7311
DOI:10.1109/TRPMS.2024.3443831