Excellent Endurance (> 1013) of Charge Trap Memory Based on HxWO3 Charge Trap Layer With Shallow Trap Level Using Hydrogen Spillover

In this study, we present an IGZO-based volatile charge trap memory, employing a hydrogenated WO 3 (H x WO _{{3}}\text {)} charge trap layer (CTL) with shallow traps. To overcome the interfacial issues in conventional Si-based transistors, we utilized the IGZO transistor to facilitate fast charge trapping / de-trapping within the CTL without barrier. Furthermore, through the hydrogen spillover with chemical reaction, we engineered the trap level and density in WO x based CTL to achieve the shallow trap levels. Consequently, for the shallow trap level, high hydrogen concentration (>10%) was realized in the CTL owing to low activation energy with hydrogen spillover. In addition, both experimental results and Density Functional Theory simulations confirmed that hydrogen interstitial defects (H _{\text {i}}\text {)} could serve as shallow traps (