A 0.09-pJ/b/dB 28-Gb/s Digital CDR With ISI-Resistant Phase Detector
This brief presents a 28-Gb/s digital clock and data recovery (CDR) with a phase detector (PD) resistant to inter-symbol interference (ISI). The effect of the ISI on the conventional bang-bang PD (BBPD) is examined by an analysis of pattern variations and simulations. The maximum gain of the BBPD is...
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Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2024-11, Vol.71 (11), p.4618-4622 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | This brief presents a 28-Gb/s digital clock and data recovery (CDR) with a phase detector (PD) resistant to inter-symbol interference (ISI). The effect of the ISI on the conventional bang-bang PD (BBPD) is examined by an analysis of pattern variations and simulations. The maximum gain of the BBPD is severely decreased as the channel loss increases. To improve the PD gain, the number of consecutive samples used in the BBPD is extended from 3 bits to 5 bits. Moreover, the proposed ISI-resistant PD (IRPD) obtains a further enhancement by utilizing additional patterns generated in high channel loss. As a result, the IRPD achieves a 120% higher PD gain compared to the conventional BBPD in 15-dB channel loss. Fabricated in a 28-nm CMOS technology, the prototype CDR consumes 37.7 mW at 28 Gb/s and achieves a bit error rate (BER) of 10−9 over 15-dB loss. |
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ISSN: | 1549-7747 1558-3791 |
DOI: | 10.1109/TCSII.2024.3440584 |