Built-in test for complex digital integrated circuits
A method for testing the logic function of complex digital integrated circuits is presented. The extra hardware needed is kept minimal by functional conversion of already existing components (e.g., registers). The feasibility of the proposed method is demonstrated by results from both hardware simul...
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Veröffentlicht in: | IEEE journal of solid-state circuits 1980-06, Vol.15 (3), p.315-319 |
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container_title | IEEE journal of solid-state circuits |
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creator | Konemann, B. Zwiehoff, G. Mucha, J. |
description | A method for testing the logic function of complex digital integrated circuits is presented. The extra hardware needed is kept minimal by functional conversion of already existing components (e.g., registers). The feasibility of the proposed method is demonstrated by results from both hardware simulation and logic simulation. The method is based on an adapted version of signature analysis, and on circuit partitioning (the structure of VLSI circuits is assumed to be inherently modular). |
doi_str_mv | 10.1109/JSSC.1980.1051391 |
format | Article |
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ispartof | IEEE journal of solid-state circuits, 1980-06, Vol.15 (3), p.315-319 |
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language | eng |
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subjects | Built-in self-test Circuit analysis Circuit simulation Circuit testing Digital integrated circuits Hardware Integrated circuit testing Logic functions Logic testing Registers |
title | Built-in test for complex digital integrated circuits |
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