An IEEE 802.15.4/4z Coherent Quadrature Hybrid Correlation UWB Receiver in 65-nm CMOS

This article presents a coherent ultra-wideband (UWB) receiver architecture based on a quadrature hybrid correlation (QHC) method that significantly reduces the digital-correlation-relevant power in the conventional standard-compliant UWB receiver. The proposed QHC receiver front end employs analog correlation, two-step synchronization with a digital-assisted path, and time-interleaved (TI) sampling methods for low-power synchronization and demodulation. A code-mismatch-evaluation method is adopted to achieve the time-of-arrival (ToA) function. In addition, a ternary analog correlator is designed for noise mitigation and high-quality computing. A prototype UWB receiver covering an 8-GHz channel is implemented in 65-nm CMOS. The receiver supports preamble, scrambled timestamp sequence (STS), and burst position modulation (BPM) with a symbol rate of 0.98/7.8 Mbaud/s. With a duty-cycled operation, the receiver consumes 17.3 mW at 0.98 Mbaud/s with a sensitivity of −88 dBm at a bit-error rate (BER) of 10−3 during payload. The blocker tolerance is −24 dBm. In the STS field, the receiver achieves an rms ranging error of 1.9 cm.