A Two-Prong Approach to the Simulation of DC-RSD: TCAD and SPICE
The DC-coupled resistive silicon detectors (DC-RSD) are the evolution of the AC-coupled RSD (RSD) design, both based on the low-gain avalanche diode (LGAD) technology. The DC-RSD design concept intends to address a few known issues present in RSDs (e.g., baseline fluctuation and long tail-bipolar si...
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Veröffentlicht in: | IEEE transactions on nuclear science 2024-02, Vol.71 (2), p.127-134 |
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Sprache: | eng |
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Zusammenfassung: | The DC-coupled resistive silicon detectors (DC-RSD) are the evolution of the AC-coupled RSD (RSD) design, both based on the low-gain avalanche diode (LGAD) technology. The DC-RSD design concept intends to address a few known issues present in RSDs (e.g., baseline fluctuation and long tail-bipolar signals) while maintaining their advantages (e.g., signal spreading and 100% fill factor). The simulation of DC-RSD presents several unique challenges linked to the complex nature of its design and the large pixel size. The defining feature of DC-RSD, charge sharing over distances that can be as large as a millimeter, represents a formidable challenge for technology CAD (TCAD), the standard simulation tool. To circumvent this problem, we have developed a mixed-mode approach to the DC-RSD simulation, which exploits a combination of two simulation tools: TCAD and SPICE. Thanks to this hybrid approach, it has been possible to demonstrate that, according to the simulation, the key features of the RSD-excellent timing and spatial resolutions (few tens of picoseconds and few microns)-are maintained in the DC-RSD design. In this work, we present the developed models and methodology, mainly showing the results of device-level numerical simulation, which have been obtained with the state-of-the-art Synopsys Sentaurus TCAD suite of tools. Such results will provide all the necessary information for the first batch of DC-RSD produced by the Fondazione Bruno Kessler (FBK) foundry in Trento, Italy. |
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ISSN: | 0018-9499 1558-1578 |
DOI: | 10.1109/TNS.2024.3356826 |