Reliability Improvement in Vertical NAND Flash Cells Using Adaptive Incremental Step Pulse Programming (A-ISPP) and Incremental Step Pulse Erasing (ISPE)

In order to improve the reliability of vertical NAND (V-NAND) flash memory cells, a scheme using adaptive incremental step pulse programming (A-ISPP) and incremental step pulse erasing (ISPE) is proposed. Incremental step pulse programming (ISPP) with adaptive step voltage is used to precisely adjust {V}_{\text {th}} to a low target value while rapidly increasing {V}_{\text {th}} to a high target value. By applying ISPE after A-ISPP, an accurate {V}_{\text {th}} with improved retention characteristics is obtained at a high target {V}_{\text {th}} level. Compared to the conventional ISPP, the proposed scheme improves adjusted {V}_{\text {th}} accuracy and {V}_{\text {th}} dispersion by 60% using the same step voltage and a similar number of pulses. With the proposed scheme, the retention characteristics are also improved by ~43%, and the distribution of \Delta {V}_{\text {th}} is narrowed by ~38%.