Hardware-Software Co-Optimization of Long-Latency Stochastic Computing
Stochastic computing (SC) is an emerging paradigm that offers hardware-efficient solutions for developing low-cost and noise-robust architectures. In SC, deterministic logic systems are employed along with bit-stream sources to process scalar values. However, using long bit-streams introduces challe...
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| Veröffentlicht in: | IEEE embedded systems letters 2023-12, Vol.15 (4), p.190-193 |
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| container_title | IEEE embedded systems letters |
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| creator | Aygun, Sercan Kouhalvandi, Lida Najafi, M. Hassan Ozoguz, Serdar Gunes, Ece Olcay |
| description | Stochastic computing (SC) is an emerging paradigm that offers hardware-efficient solutions for developing low-cost and noise-robust architectures. In SC, deterministic logic systems are employed along with bit-stream sources to process scalar values. However, using long bit-streams introduces challenges, such as increased latency and significant energy consumption. To address these issues, we present an optimization-oriented approach for modeling and sizing new logic gates, which results in optimal latency. The optimization process is automated using hardware-software cooperation by integrating Cadence and MATLAB environments. Initially, we optimize the circuit topology by leveraging the design parameters of two-input basic logic gates. This optimization is performed using a multiobjective approach based on a deep neural network. Subsequently, we employ the proposed gates to demonstrate favorable solutions targeting SC-based operations. |
| doi_str_mv | 10.1109/LES.2023.3298734 |
| format | Article |
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| identifier | ISSN: 1943-0663 |
| ispartof | IEEE embedded systems letters, 2023-12, Vol.15 (4), p.190-193 |
| issn | 1943-0663 1943-0671 |
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| source | IEEE Electronic Library (IEL) |
| subjects | Analog optimization Artificial neural networks Circuit design co-processing Computation Design parameters Energy consumption Gates (circuits) Geometry Hardware latency reduction Libraries Logic circuits Logic gates Power demand Software stochastic computing (SC) Stochastic processes Topology optimization Transistors |
| title | Hardware-Software Co-Optimization of Long-Latency Stochastic Computing |
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