A 46.6 \mu g/ \surd Hz Single-Chip Accelerometer Exploiting a DTC-Assisted Chopper Amplifier

This article presents a single-chip accelerometer with the best reported thermal noise and the lowest bias instability among state-of-the-art accelerometers with high- g ( > 1000 g) sensing capability. Complete single-chip integration of microelectromechanical transducers, readout circuits, and environmental sensors is achieved by leveraging a CMOS-microelectromechanical systems (MEMS) approach. Simple equations are derived to estimate the gain degradation issue due to delay mismatch in chopper amplifiers. A coarse digital-to-time converter (CDTC) assisted chopper amplifier is introduced to suppress the gain degradation nonideality and potentially improve the energy efficiency. Measurements and simulations validate the accuracy of the predictions and efficacy of the CDTC-based signal-boosting technique. A fine digital-to-time converter (FDTC) assisted demodulation clock skew compensation technique is employed to further suppress the residual flicker noise in chopper amplifiers. Measurement results validate the preliminary investigation of the clock skew-induced residual flicker noise and prove the benefit of FDTC-assisted flicker noise reduction. Both low- g and high- g performance are characterized. Fabricated in a standard 180 nm CMOS process followed by post-CMOS processing, the accelerometer achieves 46.6 \mu g / \surd Hz thermal noise, 472 \mu g bias instability, and > 1000 TEXPRESERVE13 full-scale (FS).