A 0.0058-mm ^ Inductor-Less CMOS Active Balun With Gain and Phase Errors Within - 0.1 \pm 0.2 dB and - 0.18 \pm 1.17 ^ From DC to 8 GHz

This paper presents a low-imbalance and inductor-less active balun. The large immittance of the parasitics increases gain and phase errors in single-ended-to-differential conversion at high frequencies. Positive feedback is effective in reducing these errors. However, there is a trade-off between the stability of the feedback and the imbalance correction. This paper analyzes this trade-off, and the common-mode rejection ratio (CMRR) was improved by adding a capacitor. Besides, we established the feedback loops for the imbalance correction are also available for bandwidth extension, that is the additional capacitor improves not only the CMRR but also the high-frequency gain. This peaking technique removes inductors that consume large chip areas. The balun was fabricated in a 0.18- \mu m CMOS process and achieved a small core area of 0.0058 mm ^{2} . In addition, a self-bias scheme using a current mirror was devised. It ensures a good bias current balance and reduces errors. The manufacturing variation of the fabricated baluns was statistically evaluated. To obtain the 99.7% limit of the CMRR, we extended the theory of the random CMRR to the complex plane. The measurement results demonstrated small errors within - 0.1 \pm 0.2 dB and - 0.18 \pm 1.17 ^{\circ} including a variation of \pm 3 \sigma from DC to 8.0 GHz.