A 120-GHz Class-F Frequency Doubler With 7.8-dBm POUT in 55-nm Bulk CMOS

This article analyzes the 2nd-order harmonic power generation with power level boosted by fundamental and 3rd-order harmonic based on the Krummenacher-Vittoz (EKV) models. The optimal waveforms of fundamental and 3rd-order harmonic are derived for maximizing the 2nd-order harmonic power. Adopting this method, a class-F frequency doubler in a 55-nm bulk CMOS technology is designed, fabricated, and measured. The doubler prototype achieves a 3-dB operation bandwidth of 112-125 GHz, a maximum output power ( P_{\mathrm {OUT}} ) of 7.8 dBm, a maximum conversion gain (CG) of −0.46 dB, a maximum efficiency of 6.8% with dc power consumption of 88 mW, and a core area of only 0.13 mm 2 . To the best of our knowledge, the proposed class-F doubler achieves the highest P_{\mathrm {OUT}} among similar CMOS works and is comparable to those in advanced SiGe technologies.