Approach to solve the reliability problem at packaging level in the matrix VLSI
In this paper the problem of increasing the reliability of the designed devices, implemented on the matrix VLSI has been considered. The proposed approach consists in choosing of the special area in the chip during mapping procedure at the packaging level. Usage of such approach allows for the desig...
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| creator | Vasiltsov, I.V. Mandziy, B.A. Bench, A. |
| description | In this paper the problem of increasing the reliability of the designed devices, implemented on the matrix VLSI has been considered. The proposed approach consists in choosing of the special area in the chip during mapping procedure at the packaging level. Usage of such approach allows for the designer to obtain a more optimal topology solution, and thus will increase the reliability of designed devices. |
| doi_str_mv | 10.1109/MIEL.2002.1003355 |
| format | Conference Proceeding |
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| identifier | ISBN: 0780372352 |
| ispartof | 2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595), 2002, Vol.2, p.703-706 vol.2 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Chemical technology Costs Military computing Packaging Power generation Power supplies Power system reliability Tellurium Topology Very large scale integration |
| title | Approach to solve the reliability problem at packaging level in the matrix VLSI |
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