Approach to solve the reliability problem at packaging level in the matrix VLSI

Approach to solve the reliability problem at packaging level in the matrix VLSI

In this paper the problem of increasing the reliability of the designed devices, implemented on the matrix VLSI has been considered. The proposed approach consists in choosing of the special area in the chip during mapping procedure at the packaging level. Usage of such approach allows for the desig...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Vasiltsov, I.V., Mandziy, B.A., Bench, A.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Chemical technology
Costs
Military computing
Packaging
Power generation
Power supplies
Power system reliability
Tellurium
Topology
Very large scale integration
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Beschreibung
Zusammenfassung:In this paper the problem of increasing the reliability of the designed devices, implemented on the matrix VLSI has been considered. The proposed approach consists in choosing of the special area in the chip during mapping procedure at the packaging level. Usage of such approach allows for the designer to obtain a more optimal topology solution, and thus will increase the reliability of designed devices.
DOI:10.1109/MIEL.2002.1003355