Investigation on the structure function of an electronic packaging to verify detailed thermal model assumptions

An accurate operating temperature prediction of an electronic component has become fundamental to assure its physical integrity during its lifecycle. Indeed, thermal fatigue is one of the main failure sources in electronic systems. Therefore, the creation of a Detailed Thermal Model is usually required, for which the knowledge of component geometrical and thermal parameters are necessary. Then, this article deals with the analysis of the step response of the electronic device junction temperature to identify and quantify potential uncertainties on some ones. An iterative deconvolution process, namely known as Bayesian approach, is implemented to extract an RC series network, which accurately models the thermal behaviour of the component. Nevertheless, a physical interpretation of the parameters of this Foster network is not possible, hence the necessity of its conversion into a Cauer one. Usual numerical limitations of this network conversion are overcome in this study. Thus, from the Cauer parameters, the associated Structure Function plot is achievable with accuracy. A recalibration numerical model process can thus be conducted with a relative study on these functions. Indeed, their graphical superposition leads to extract some useful information about the package itself. Therefore, by applying this method on numerical and experimental thermal impedance data from the relevant numerical model of a test electronic board and real measurement on this latter, the correction of the model assumptions is performed. Using test cases, performances and limitations of the method are discussed.