Investigation of SiC Thyristors with Varying Amplifying Gate Design

This paper presents experimental 1.2 kV, 10 A SiC thyristors with different amplifying gate design. In contrast to comparative devices (with simple gate) the amplifying gate thyristors show a characteristic snap-back and a higher gate current to trigger. Their gate-anode I-V characteristics comply with the underlying design constraint, regarding the resistances of pilot and main thyristor: (RP > RM). Moreover, the turn-on waveforms of well-designed amplifying gate thyristors reveal peak-shaped inversions in the gate current and voltage transients, providing clear evidence of the successive triggering of pilot and main thyristor.