Study of annealing temperature influence on the performance of top gated graphene/SiC transistors

► We used a 20nm ALD alumina layer as high-k gate dielectric on graphene. ► Annealed alumina dielectric prevents graphene from adsorbing impurities. ► This annealed alumina dielectric enhances the performance of graphene FETs. In this study, we investigate the impact of thermal annealing on the electrical characteristics of epitaxial graphene field effect transistors. Top gated devices were fabricated from graphene obtained on silicon carbide (SiC) substrate. Thanks to an annealing at 300°C, the performance of the devices was enhanced by a factor of 90. The maximal transconductance reached significantly high values such as 5300μS/μm at VD=3V, corresponding to a carrier mobility of 2000cm2V−1s−1.