Avalanche ruggedness of parallel SiC power MOSFETs
The aim of this paper is to investigate the impact of electro-thermal device parameter spread on the avalanche ruggedness of parallel silicon carbide (SiC) power MOSFETs representative of multi-chip layout within an integrated power module. The tests were conducted on second generation 1200 V, 36 A–...
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| Veröffentlicht in: | Microelectronics and reliability 2018-09, Vol.88-90, p.666-670 |
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| container_title | Microelectronics and reliability |
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| creator | Fayyaz, A. Asllani, B. Castellazzi, A. Riccio, M. Irace, A. |
| description | The aim of this paper is to investigate the impact of electro-thermal device parameter spread on the avalanche ruggedness of parallel silicon carbide (SiC) power MOSFETs representative of multi-chip layout within an integrated power module. The tests were conducted on second generation 1200 V, 36 A–80 mΩ rated devices. Different temperature-dependent electrical parameters were identified and measured for a number of devices. The influence of spread in measured parameters was investigated experimentally during avalanche breakdown transient switching events and important findings have been highlighted.
•Avalanche breakdown operation of parallel SiC power MOSFETs is presented in this paper.•Important electro-thermal device parameters are identified which effect avalanche operation during parallel device operation.•Influence of spread in device electro-thermal parameters on avalanche breakdown operation has been investigated.•Three different scenarios have been presented which may occur depending on the device spread.•Due to parameter spread, current unbalance between devices occur which may result in different stress profiles among devices. |
| doi_str_mv | 10.1016/j.microrel.2018.06.038 |
| format | Article |
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•Avalanche breakdown operation of parallel SiC power MOSFETs is presented in this paper.•Important electro-thermal device parameters are identified which effect avalanche operation during parallel device operation.•Influence of spread in device electro-thermal parameters on avalanche breakdown operation has been investigated.•Three different scenarios have been presented which may occur depending on the device spread.•Due to parameter spread, current unbalance between devices occur which may result in different stress profiles among devices.</description><identifier>ISSN: 0026-2714</identifier><identifier>EISSN: 1872-941X</identifier><identifier>DOI: 10.1016/j.microrel.2018.06.038</identifier><language>eng</language><publisher>Elsevier Ltd</publisher><subject>Avalanche ruggedness ; Condensed Matter ; Electronics ; Engineering Sciences ; Parallel operation ; Physics ; Power MOSFETs ; Robustness ; SiC ; UIS</subject><ispartof>Microelectronics and reliability, 2018-09, Vol.88-90, p.666-670</ispartof><rights>2018 Elsevier Ltd</rights><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c394t-8817f6a15c726acbc676cf67efe9c644e3db5aaf980a45003255a25381d039b83</citedby><cites>FETCH-LOGICAL-c394t-8817f6a15c726acbc676cf67efe9c644e3db5aaf980a45003255a25381d039b83</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://dx.doi.org/10.1016/j.microrel.2018.06.038$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>230,314,780,784,885,3550,27924,27925,45995</link.rule.ids><backlink>$$Uhttps://hal.science/hal-01889463$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Fayyaz, A.</creatorcontrib><creatorcontrib>Asllani, B.</creatorcontrib><creatorcontrib>Castellazzi, A.</creatorcontrib><creatorcontrib>Riccio, M.</creatorcontrib><creatorcontrib>Irace, A.</creatorcontrib><title>Avalanche ruggedness of parallel SiC power MOSFETs</title><title>Microelectronics and reliability</title><description>The aim of this paper is to investigate the impact of electro-thermal device parameter spread on the avalanche ruggedness of parallel silicon carbide (SiC) power MOSFETs representative of multi-chip layout within an integrated power module. The tests were conducted on second generation 1200 V, 36 A–80 mΩ rated devices. Different temperature-dependent electrical parameters were identified and measured for a number of devices. The influence of spread in measured parameters was investigated experimentally during avalanche breakdown transient switching events and important findings have been highlighted.
•Avalanche breakdown operation of parallel SiC power MOSFETs is presented in this paper.•Important electro-thermal device parameters are identified which effect avalanche operation during parallel device operation.•Influence of spread in device electro-thermal parameters on avalanche breakdown operation has been investigated.•Three different scenarios have been presented which may occur depending on the device spread.•Due to parameter spread, current unbalance between devices occur which may result in different stress profiles among devices.</description><subject>Avalanche ruggedness</subject><subject>Condensed Matter</subject><subject>Electronics</subject><subject>Engineering Sciences</subject><subject>Parallel operation</subject><subject>Physics</subject><subject>Power MOSFETs</subject><subject>Robustness</subject><subject>SiC</subject><subject>UIS</subject><issn>0026-2714</issn><issn>1872-941X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><recordid>eNqFkE1LAzEYhIMoWKt_QfbqYdc3H5tkb5aiVqj0UAVvIc2-26ak3ZJoxX9vStWrp4FhZmAeQq4pVBSovF1XG-9iHzFUDKiuQFbA9QkZUK1Y2Qj6dkoGAEyWTFFxTi5SWgOAAkoHhI32NtitW2ERP5ZLbLeYUtF3xc5GGwKGYu7Hxa7_xFg8z-YP9y_pkpx1NiS8-tEhec32eFJOZ49P49G0dLwR76XWVHXS0topJq1bOKmk66TCDhsnhUDeLmpru0aDFTUAZ3VtWc01bYE3C82H5Oa4u7LB7KLf2PhleuvNZDQ1By-f1Y2QfE9zVh6zGURKEbu_AgVzoGTW5peSOVAyIE2mlIt3xyLmJ3uP0STnceuw9RHdu2l7_9_ENx60ci8</recordid><startdate>201809</startdate><enddate>201809</enddate><creator>Fayyaz, A.</creator><creator>Asllani, B.</creator><creator>Castellazzi, A.</creator><creator>Riccio, M.</creator><creator>Irace, A.</creator><general>Elsevier Ltd</general><general>Elsevier</general><scope>AAYXX</scope><scope>CITATION</scope><scope>1XC</scope><scope>VOOES</scope></search><sort><creationdate>201809</creationdate><title>Avalanche ruggedness of parallel SiC power MOSFETs</title><author>Fayyaz, A. ; Asllani, B. ; Castellazzi, A. ; Riccio, M. ; Irace, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c394t-8817f6a15c726acbc676cf67efe9c644e3db5aaf980a45003255a25381d039b83</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2018</creationdate><topic>Avalanche ruggedness</topic><topic>Condensed Matter</topic><topic>Electronics</topic><topic>Engineering Sciences</topic><topic>Parallel operation</topic><topic>Physics</topic><topic>Power MOSFETs</topic><topic>Robustness</topic><topic>SiC</topic><topic>UIS</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Fayyaz, A.</creatorcontrib><creatorcontrib>Asllani, B.</creatorcontrib><creatorcontrib>Castellazzi, A.</creatorcontrib><creatorcontrib>Riccio, M.</creatorcontrib><creatorcontrib>Irace, A.</creatorcontrib><collection>CrossRef</collection><collection>Hyper Article en Ligne (HAL)</collection><collection>Hyper Article en Ligne (HAL) (Open Access)</collection><jtitle>Microelectronics and reliability</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Fayyaz, A.</au><au>Asllani, B.</au><au>Castellazzi, A.</au><au>Riccio, M.</au><au>Irace, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Avalanche ruggedness of parallel SiC power MOSFETs</atitle><jtitle>Microelectronics and reliability</jtitle><date>2018-09</date><risdate>2018</risdate><volume>88-90</volume><spage>666</spage><epage>670</epage><pages>666-670</pages><issn>0026-2714</issn><eissn>1872-941X</eissn><abstract>The aim of this paper is to investigate the impact of electro-thermal device parameter spread on the avalanche ruggedness of parallel silicon carbide (SiC) power MOSFETs representative of multi-chip layout within an integrated power module. The tests were conducted on second generation 1200 V, 36 A–80 mΩ rated devices. Different temperature-dependent electrical parameters were identified and measured for a number of devices. The influence of spread in measured parameters was investigated experimentally during avalanche breakdown transient switching events and important findings have been highlighted.
•Avalanche breakdown operation of parallel SiC power MOSFETs is presented in this paper.•Important electro-thermal device parameters are identified which effect avalanche operation during parallel device operation.•Influence of spread in device electro-thermal parameters on avalanche breakdown operation has been investigated.•Three different scenarios have been presented which may occur depending on the device spread.•Due to parameter spread, current unbalance between devices occur which may result in different stress profiles among devices.</abstract><pub>Elsevier Ltd</pub><doi>10.1016/j.microrel.2018.06.038</doi><tpages>5</tpages><oa>free_for_read</oa></addata></record> |
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| source | Elsevier ScienceDirect Journals Complete |
| subjects | Avalanche ruggedness Condensed Matter Electronics Engineering Sciences Parallel operation Physics Power MOSFETs Robustness SiC UIS |
| title | Avalanche ruggedness of parallel SiC power MOSFETs |
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