An FPGA based track finder for the L1 trigger of the CMS experiment at the High Luminosity LHC

A new tracking detector is under development for use by the CMS experiment at the High-Luminosity LHC (HL-LHC). A crucial requirement of this upgrade is to provide the ability to reconstruct all charged particle tracks with transverse momentum above 2–3 GeV within 4μs so they can be used in the Leve...

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Veröffentlicht in:Journal of instrumentation 2017-12, Vol.12 (12), p.P12019-P12019
Hauptverfasser: Aggleton, R., Ardila-Perez, L.E., Ball, F.A., Balzer, M.N., Boudoul, G., Brooke, J., Caselle, M., Calligaris, L., Cieri, D., Clement, E., Dutta, S., Hall, G., Harder, K., Hobson, P.R., Iles, G.M., James, T.O., Manolopoulos, K., Matsushita, T., Morton, A.D., Newbold, D., Paramesvaran, S., Pesaresi, M., Pozzobon, N., Reid, I.D., Rose, A.W., Sander, O., Shepherd-Themistocleous, C., Shtipliyski, A., Schuh, T., Skinnari, L., Summers, S.P., Tapper, A., Thea, A., Tomalin, I., Uchida, K., Vichoudis, P., Viret, S., Weber, M.
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Sprache:eng
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Zusammenfassung:A new tracking detector is under development for use by the CMS experiment at the High-Luminosity LHC (HL-LHC). A crucial requirement of this upgrade is to provide the ability to reconstruct all charged particle tracks with transverse momentum above 2–3 GeV within 4μs so they can be used in the Level-1 trigger decision. A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are reconstructed using a projective binning algorithm based on the Hough Transform, followed by a combinatorial Kalman Filter. A hardware demonstrator using MP7 processing boards has been assembled to prove the entire system functionality, from the output of the tracker readout boards to the reconstruction of tracks with fitted helix parameters. It successfully operates on one eighth of the tracker solid angle acceptance at a time, processing events taken at 40 MHz, each with up to an average of 200 superimposed proton-proton interactions, whilst satisfying the latency requirement. The demonstrated track-reconstruction system, the chosen architecture, the achievements to date and future options for such a system will be discussed.
ISSN:1748-0221
1748-0221
DOI:10.1088/1748-0221/12/12/P12019