Electrical characterization of SOI pMOS device leakage

•Drain leakage currents down to a few fA have been measured thanks to a dedicated setup.•Leakage mechanism predominance region have been determined from temperature measurement (activation energy criteria).•Shockley-Read-Hall Field-Enhanced leakage is slightly dependent on silicon thickness and back...

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Veröffentlicht in:Solid-state electronics 2023-10, Vol.208, p.108740, Article 108740
Hauptverfasser: Bosch, D., Lheritier, P., Guyader, F., Joblot, S., Ponthenier, F., Lacord, J.
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Sprache:eng
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Zusammenfassung:•Drain leakage currents down to a few fA have been measured thanks to a dedicated setup.•Leakage mechanism predominance region have been determined from temperature measurement (activation energy criteria).•Shockley-Read-Hall Field-Enhanced leakage is slightly dependent on silicon thickness and back bias and highly on temperature.•Band-to-band-tunneling leakage is dependent on channel doping. This work investigates Silicon-on-Insulator (SOI) pMOS leakage current. Temperature measurements indicates the superposition of two leakage mechanisms: band-to-band tunneling (BTBT) and Shockley-Read-Hall Field-Enhanced (SRHFE) generation recombination. Thanks to a dedicated low current measurement setup, the impact of device width (W), thickness (tsi) and polarization (back bias, drain and source) on leakage level is evaluated for both mechanisms.
ISSN:0038-1101
1879-2405
DOI:10.1016/j.sse.2023.108740