212-Gbit/s 2:1 multiplexing selector realised in InP DHBT
In this Letter, the authors report on the design, optimisation and electrical measurements of a new fully integrated multiplexing selector fabricated in 0.7-µm indium phosphide (InP) double-heterojunction bipolar transistor technology. All parts of the circuit were optimised to obtain 200-Gbit/s cla...
Gespeichert in:
Veröffentlicht in: | Electronics letters 2019-03, Vol.55 (5), p.242-244 |
---|---|
Hauptverfasser: | , , , , , , , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | In this Letter, the authors report on the design, optimisation and electrical measurements of a new fully integrated multiplexing selector fabricated in 0.7-µm indium phosphide (InP) double-heterojunction bipolar transistor technology. All parts of the circuit were optimised to obtain 200-Gbit/s class of operation. They present electrical performances at 140 and to a record speed of 212 Gbit/s, highlighting their respective measurement challenges. The power consumption of the circuit is 0.5 and 0.8 W for a differential output amplitude of 240 and 730 mV, respectively. This selector has been successfully used as modulator driver in optical transmission experiments up to 204 Gbit/s. |
---|---|
ISSN: | 0013-5194 1350-911X 1350-911X |
DOI: | 10.1049/el.2018.7545 |