A silicon backplane technology for microdisplays

A silicon backplane technology is described for the fabrication of high-resolution microdisplays. The technology is embedded in a 0.7 mum CMOS technology, and comprises DEMOS devices for enabling voltage spans of 12 V, and a special back-end processing module for planarizing the wafer and light shie...

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Bibliographische Detailangaben
Hauptverfasser: De Backere, Christof, Vermandel, Miguel, Van den Steen, Jean, De Smet, Herbert, Van Calster, André, Colson, Paul, Schols, Gust, Tack, Marnix
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:A silicon backplane technology is described for the fabrication of high-resolution microdisplays. The technology is embedded in a 0.7 mum CMOS technology, and comprises DEMOS devices for enabling voltage spans of 12 V, and a special back-end processing module for planarizing the wafer and light shielding. This technology is used to develop a GXGA (2560times2048 pixels) microdisplay with 15 mum pixels on which the first results are reported.