CONTROL GATE-ADDRESSED CMOS NON-VOLATILE CELL THAT PROGRAMS THROUGH GATES OF CMOS TRANSISTORS

An improved control gate-addressed CMOS memory cell is provided which allows for programming and erasing by tunneling through the gate oxides of the PMOS and NMOS transistors. The CMOS memory cell (400) includes a PMOS transistor (402), an NMOS transistor (403), and an NMOS pass transistor (405). A capacitor (430) has a first terminal coupled to a common floating gate (416) of the PMOS and NMOS transistors and has a second terminal coupled to a control gate node.