PROCEDURE AND DEVICE TO DETERMINE DATA TRANSMISSION RATE AND SIGNAL DISTORTION OF SYNCHRONOUS AND ASYNCHRONOUS SERIAL DATA TRANSMISSION LINES

In the course of the procedure the time interval between two successive signal changes is determined and possibly stored in such a way, that the time interval measured between the last two signal changes is compared with the previously stored minimum value, and at the same time with a minimum limit...

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Bibliographische Detailangaben
Hauptverfasser: DANI, CSABA, HUNYADI, JOZSEF, MAYER, ISTVAN, KOEVESHEGYI, LASZLO, HUNYA, LASZLO, SZEMEREKI, ZOLTAN, SZEBENYI, ENDRE
Format: Patent
Sprache:eng
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Zusammenfassung:In the course of the procedure the time interval between two successive signal changes is determined and possibly stored in such a way, that the time interval measured between the last two signal changes is compared with the previously stored minimum value, and at the same time with a minimum limit postulated and stored beforehand; the value of time interval just measured will only be stored as the new minimum value, if it is less than the previously stored one, but at the same time it is greater than the postulated minimum limit (in this case the previously stored minimum value will be lost); and/or in the course of the comparisons it will be investigated, whether the value lastly measured is greater than the previously stored maximum value, and at the same time, it is less than the maximum limit postulated and stored beforehand, and thereafter the new value will only be stored as the new maximum value, if the above conditions are fulfilled (in this case however, the previously stored maximum value is lost). The invented device comprises a control unit (11), an address decoder unit (13), a first gating unit (14), a baud-rate and signal distortion detector unit (12) and a second gating unit (15). The inputs of the baud-rate and signal distortion unit (12) are connected via the first addressing line (b) and via the second addressing line (d) to the respective outputs of the address decoder unit (13), another input via the third addressing line (e) to a further output of the address decoder unit (13) and to an input of the first gating unit (14), a further input via the fourth addressing line (f) to a further output of the address decoder unit (13) and to an input of the second gating unit (15), further inputs of it to the group of input data lines (E) constituting the input of the device, the remaining inputs via the group of writing lines (C), being a subset of the group of central lines (A) to the inputs/outputs of the control unit (11); the outputs of the baud-rate and signal distortion detector unit via the first bunch of data lines (F) to the further inputs of the first gating unit (14), via the second bunch of data lines (G) to the further inputs of the second gating unit (15). The outputs of the first gating unit (14) are applied via the group of reading lines (B) constituting a part of the group of central lines (A) to the inputs/outputs of the control unit (11) and to the outputs of the second gating unit (15). Dans le procédé, l'intervalle de temp