IMAGE SENSOR AND READOUT CIRCUIT THEREOF

The present application provides an image sensor and a readout circuit (1) thereof. The readout circuit (1) of the image sensor comprises a ramp voltage circuit (10), a comparator circuit (20), a counter circuit (30), and a negation control circuit (40). When switching counting, the negation control circuit (40) is arranged to control the counter circuit (30) to negate a first digital code value into a second digital code value; and in a second quantization time period, the counter circuit (30) performs counting on the basis of the second digital code value to generate a third digital code value. Therefore, correlated double sampling is achieved, fixed-pattern noise is eliminated, and the imaging quality is improved. Additionally, a buffer and an additional holding circuit do not need to be arranged in the readout circuit (1), thereby simplifying the circuit structure, reducing power consumption, and ensuring that the counter circuit works in a high-frequency counting mode. La présente demande concerne un cap